1. Field of the Invention
The present invention relates generally to processing systems, and more specifically to multi-core processing systems.
2. Background Art
In the past, increasing performance in processing-intensive electronic devices, such as base transceiver stations and other types of communications devices, could be achieved merely by increasing the processor clock speed of the devices. However, the introduction of applications requiring very fast processing performance to meet application latency requirements, such as Voice over Internet Protocol (VoIP), video conferencing, multimedia streaming, and other real-time applications have rendered this simple approach as no longer practical. As a result, the use of multi-core systems has become a popular approach for increasing performance in processing-intensive electronic devices, such as base station transceivers. To realize the potential increase in performance that multiple processing cores can provide, however, each processing core needs to be programmed so that the processing workload is appropriately divided over all of the processing cores.
However, programming multiple processing cores can be significantly more complicated than programming a single core, placing a heavy burden on programmers. To avoid this burden, many software development paradigms are still focused on sequentially organized single-core applications. As a result, development tools are often not well suited to programming for multi-core systems. In order to efficiently utilize multiple cores, programmers have thus been traditionally required to understand the low-level hardware implementation details for the multi-core system to be programmed, manually specifying intra-core communication, task delegation, and other hardware details. Programmers may find it difficult to adhere to application development budgets and schedules with this extra burden, leading to software applications that may be poorly optimized for use on multi-core hardware systems.
Accordingly, there is a need in the art for a multi-core system that can effectively address the aforementioned difficulty of programming, facilitating development and optimizing of software for multi-core systems.